Yifeng Xiao

Hi there! It's Yifeng (Ethan). I am currently a EECS Ph.D. student at the University of California, Berkeley (UCB), advised by Prof. Pierluigi Nuzzo. My research integrates optimization, machine learning, and game-theoretic modeling with formal methods to automate the design and verification of cyber-physical systems (e.g., smart power networks and multi-agent drone swarms).

I received my B.E. in Microelectronic Science and Engineering from Fudan University (復旦大學). I was fortunate to work with Prof. Jianli Chen and Prof. Bei Yu on machine learning-based applications in electronic design automation (EDA).

Feel free to reach out to me if you are interested in my research topics. I am always open to collaborations and coffee chats! I'm also looking for self-motivated students to work on research projects!

Publications

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  Xiao, Y. and Nuzzo, P., 2026. Contract-Based Architecture Exploration of Cyber-Physical Systems via Satisfiability Modulo Convex Programming. Accepted at 2026 IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE).
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  Xiao, Y., Certorio, J., Martins, N. C., Shoukry, Y., and Nuzzo, P., 2025. Incentive Design for Safe Nash Equilibrium Learning in Large Populations via Control Barrier Functions. Accepted at 2025 IEEE Conference on Decision and Control (CDC).
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  Xiao, Y., Xu, Y., Yan, N., Mortazavi, M., and Nuzzo, P., 2025, June. CORE: Constraint-Aware One-Step Reinforcement Learning for Simulation-Guided Neural Network Accelerator Design. In arXiv preprint arXiv:2506.03474.
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  Fayyazi, A., Xiao, Y., Pedram, M., and Nuzzo, P., 2025, April. Efficient Counterexample-Guided Fairness Verification and Repair of Neural Networks Using Satisfiability Modulo Convex Programming. In 2025 International Joint Conference on Artificial Intelligence (IJCAI).
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  Xiao, Y., Oh, C., Lora, M. and Nuzzo, P., 2024, March. Efficient Exploration of Cyber-Physical System Architectures Using Contracts and Subgraph Isomorphism. In 2024 IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE) [Best Paper Award]
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  Zhu, Z., Li, Y., Su, M., Zhang, S., Su, H., Xiao, Y., He, H., Chen, J. and Chang, Y.W., 2024. Subgraph Matching-Based Reference Placement for Printed Circuit Board Designs. In 2024 The Journal of Supercomputing.
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  Su, M., Xiao, Y., Zhang, S., Su, H., Xu, J., He, H., Zhu, Z., Chen, J. and Chang, Y.W., 2022, July. Late Breaking Results: Subgraph Matching Based Reference Placement for PCB Designs. In 2022 IEEE Design Automation Conference (DAC).
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  Xiao, Y., Su, M., Yang, H., Chen, J., Yu, J. and Yu, B., 2021, December. Low-Cost Lithography Hotspot Detection with Active Entropy Sampling and Model Calibration. In 2021 IEEE Design Automation Conference (DAC).
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  Ma, C., Xiao, Y., Wang, S., Yu, J. and Chen, J., 2021, October. CongestNN: An Bi-Directional Congestion Prediction Framework for Large-Scale Heterogeneous FPGAs. In 2021 IEEE International Conference on ASIC (ASICON).

Experiences

Awards

• [2024] DATE Best Paper Award (4/996)
• [2023] DAC Young Fellowship
• [2020] Outstanding Graduates of Shanghai (2nd Place of 122)
• [2019] National IC Design Competition - First Prize for Undergraduate Group
• [2018] SCSK Corporation Scholarship (1/122)
• [2018] Undergraduate Excellence Scholarship of Fudan University

Gallery